Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2005-04-12
2005-04-12
Le, Dung A. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S779000, C257S772000, C438S108000, C438S612000
Reexamination Certificate
active
06879048
ABSTRACT:
A method of glass frit bonding wafers to form a package, in which the width of the glass bond line between the wafers is minimized to reduce package size. The method entails the use of a glass frit material containing a particulate filler material that establishes the stand-off distance between wafers, instead of relying on discrete structural features on one of the wafers dedicated to this function. In addition, the amount of glass frit material used to form the glass bond line between wafers is reduced to such levels as to reduce the width of the glass bond line, allowing the overall size of the package to be minimized. To accommodate the variability associated with screening processes when low volume lines of paste are printed, the invention further entails the use of storage regions defined by walls adjacent the glass bond line to accommodate excess glass frit material without significantly increasing the width of the bond line. The storage regions also ensure adequate flow of glass frit material around electrical runners that cross the glass bond line, as well as into any isolation trenches surrounding the runners.
REFERENCES:
patent: 5388443 (1995-02-01), Manaka
patent: 6062461 (2000-05-01), Sparks et al.
patent: 6232150 (2001-05-01), Lin et al.
patent: 20030157426 (2003-08-01), Jordan et al.
Jordan Larry Lee
Knapp Douglas A.
Chmielewski Stefan V.
Delphi Technologies Inc.
Le Dung A.
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