Gate interface relaxation anneal method for wafer processing...

Details Gate interface relaxation anneal method for wafer processing... Gate interface relaxation anneal method for wafer processing...

2007-08-08

2009-08-18

Nhu, David (Department: 2895)

Semiconductor device manufacturing: process

Introduction of conductivity modifying dopant into...

C438S308000, C257SE21134, C257SE21135, C257SE21267, C257SE21311, C257SE21347

Reexamination Certificate

active

07575986

ABSTRACT:
Defects and fixed charge in a gate dielectric near the gate dielectric-substrate interface are reduced by performing a gate dielectric relaxation anneal step prior to source-drain ion implantation, in which the wafer temperature is ramped gradually to near a melting temperature of the substrate equal to a peak post-ion implantation anneal peak temperature. The ramping rates are sufficiently gradual so that the gate dielectric is held above its reflow temperature for a significant duration.

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