Gas distribution plate electrode for a plasma receptor

Details Gas distribution plate electrode for a plasma receptor Gas distribution plate electrode for a plasma receptor

2003-05-20

2004-01-13

Wong, Don (Department: 2821)

Electric lamp and discharge devices: systems

Discharge device load with fluent material supply to the...

Plasma generating

C156S345330, C204S298330

Reexamination Certificate

active

06677712

ABSTRACT:

BACKGROUND OF THE INVENTION
Various types of plasma reactors employed in the manufacture of semiconductor microelectronic circuits require a large RF electrode at the reactor chamber ceiling that overlies the semiconductor workpiece. Typically, the workpiece is a semiconductor wafer supported on a conductive pedestal. RF power is applied to the support pedestal, and the ceiling or overhead electrode is a counter electrode. In some reactors, the RF power applied to the support pedestal is the plasma source power (determining plasma ion density) and is also the plasma bias power (determining ion energy at the wafer surface). In other reactors, an RF power applicator other than the wafer pedestal furnishes the plasma source power, while the RF power applied to the wafer pedestal serves only as plasma RF bias power. For example, the plasma source power may be applied by an inductive antenna or may be applied by the ceiling electrode. Thus, the ceiling electrode may either be a grounded counter electrode for the RF power applied to the wafer support pedestal or it may be connected to an independent RF power generator and function as an independent RF power applicator. In either case, the most uniform distribution of process gas is obtained by introducing the process gas through the ceiling. This requires that the ceiling electrode be a gas distribution plate.
There is a continuing need to improve the uniformity of process gas distribution across the wafer surface in a plasma reactor, particularly in a plasma reactor used for semiconductor etch processes as well as other semiconductor processes. This need arises from the ever-decreasing device geometries of microelectronic circuits and minimum feature sizes, some approaching 0.15 microns. Such small device geometries are dictated in most cases by the desire for higher microprocessor clock speeds, and require corresponding improvements in etch rates, etch uniformity across the wafer surface and damage-free etching. Previously, with devices having relatively large feature sizes, a single gas inlet in the plasma reactor overhead ceiling electrode/gas distribution plate provided adequate process gas distribution uniformity. A single inlet would necessarily be of a large size in order to meet the requisite gas flow requirements.
One problem with such a large inlet is that it is more susceptible to plasma entering the inlet and causing arcing or plasma light-up within the inlet. Such arcing damages the plate and/or enlarges the inlet and consumes power. Sputtering of the plate material around the inlet can also contaminate the plasma with byproducts of the sputtering. With a large hole, the maximum electric field occurs near the center of the hole, and this is the likeliest location for plasma light-up or arcing to begin. One solution proposed for reactors having a single gas inlet was to juxtapose a disk or puck in the center of the hole to keep gases away from the intense electric field at the hole center (U.S. Pat. No. 6,885,358 by Dan Maydan). However, with current device geometries incorporating very small feature sizes, much better process gas distribution uniformity across the wafer surface is required. As a result, a single gas distribution inlet or orifice in the ceiling gas distribution plate is inadequate to provide the requisite gas distribution uniformity. Thus, an overhead gas distribution plate is currently made by drilling thousands of fine holes or orifices through the plate. The spatial distribution of such a large number of orifices improves gas distribution uniformity across the wafer surface. The smaller size makes each hole less susceptible to plasma entering the hole.
Unfortunately, it has not been practical to place or hold an individual puck in the center of each one of the thousands of holes to ward the gas away from the high intensity electric fields near the hole centers. Thus, in order to reduce plasma arcing, the gas inlet holes must be of minimal diameter and within a small dimensional hole-to-hole tolerance to ensure uniform gas distribution. Drilling such a large number of holes is costly. This is because the holes must have such a high aspect ratio, must be drilled through very hard material (such as silicon carbide) and sharp hole edges must be avoided. Moreover, the very need for such accurately sized holes means that performance is easily degraded as hole sizes are enlarged by plasma sputtering of the hole edges. Depending upon plasma ion density distribution across the ceiling surface, some holes will be widened at a greater rate than other holes, so that a gas distribution plate initially having highly uniform gas distribution across the wafer surface eventually fails to provide the requisite uniformity.
Another problem is that the need for greater etch rate has dictated a smaller wafer-to-ceiling gap in order to obtain denser plasma. The small gas orifices produce very high velocity gas streams. The high velocity gas streams thus produced can be so narrowly collimated within the narrow wafer-to-ceiling gap that the hole-to-hole spacing in the gas distribution plate produces corresponding peaks and valleys in gas density at the wafer surface and corresponding non-uniformities in etch rate across the wafer surface.
As a result, there is a need for an overhead gas distribution plate that functions as an electrode or counter electrode, and that is not susceptible to plasma arcing in the gas injection passages, that does not have high gas injection velocities and in which the gas distribution uniformity and velocity are not affected by enlargement of the gas injection passages.
SUMMARY OF THE DISCLOSURE
The invention is embodied in a plasma reactor for processing a semiconductor wafer, the reactor having a gas distribution plate including a front plate in the chamber and a back plate on an external side of the front plate, the gas distribution plate comprising a gas manifold adjacent the back plate, the back and front plates bonded together and forming an assembly. The assembly includes an array of holes through the front plate and communicating with the chamber, at least one gas flow-controlling orifice through the back plate and communicating between the manifold and at least one of the holes, the orifice having a diameter that determines gas flow rate to the at least one hole. In addition, an array of pucks is at least generally congruent with the array of holes and disposed within respective ones of the holes to define annular gas passages for gas flow through the front plate into the chamber, each of the annular gas passages being non-aligned with the orifice.


REFERENCES:
patent: 5558717 (1996-09-01), Zhao et al.
patent: 5868848 (1999-02-01), Tsukamoto
patent: 6352591 (2002-03-01), Yieh et al.
patent: 6364949 (2002-04-01), Or et al.
patent: 2002/0069968 (2002-06-01), Keller et al.

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