Gap capacitors for monitoring stress in solder balls in flip...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate

Reexamination Certificate

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Details

C438S190000, C438S210000, C438S238000, C438S239000, C438S386000, C438S399000, C438S957000, C257SE21008, C257SE21017

Reexamination Certificate

active

07939390

ABSTRACT:
A semiconductor structure formation method and operation method. The structure includes (i) a dielectric layer, (ii) a bottom capacitor plate and an electrically conductive line on the dielectric layer, (iii) a top capacitor plate on top of the bottom capacitor plate, (iv) a gap region, and (v) a solder ball on the dielectric layer. The dielectric layer includes a top surface that defines a reference direction perpendicular to the top surface. The top capacitor plate overlaps the bottom capacitor plate in the reference direction. The gap region is sandwiched between the bottom capacitor plate and the top capacitor plate. The gap region does not include any liquid or solid material. The solder ball is electrically connected to the electrically conductive line. The top capacitor plate is disposed between the dielectric layer and the solder ball.

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Notice of Allowance (Mail Date Dec. 22, 2009) for U.S. Appl. No. 12/028,845, Filing Date U.S. Appl. No. 12/028,845; Confirmation No. 7630.

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