FUSI integration method using SOG as a sacrificial...

Semiconductor device manufacturing: process – Forming schottky junction – Using platinum group metal

Reexamination Certificate

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C438S583000, C438S663000, C257SE29156

Reexamination Certificate

active

07732312

ABSTRACT:
A method for making a transistor20that includes using a transition metal nitride layer200and/or a SOG layer220to protect the source/drain regions60from silicidation during the silicidation of the gate electrode90. The SOG layer210is planarized to expose the transition metal nitride layer200or the gate electrode93before the gate silicidation process. If a transition metal nitride layer200is used, then it is removed from the top of the gate electrode93before the full silicidation of the gate electrode90.

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Jiong-Ping Lu, et al., “An Integration Scheme for Using Silicided Dual Work Function Metal Gates” U.S. Appl. No. 10/851,750, filed May 20, 2004.
Jiong-Ping Lu, et al., “A Method for Manufacturing a Semiconductor Device Having a Silicided Gate Electrode and a Method for Manufacturing an Integrated Circuit Including the Same” U.S. Appl. No. 10/810,759, filed Mar. 26, 2004.
Freidoon Mehrad, et al., “Method to Obtain Fully Silicided Poly Gate” U.S. Appl. No. 11/201,924, filed Aug. 11, 2005.

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