Fuse and method for forming

Details Fuse and method for forming Fuse and method for forming

2005-06-28

2005-06-28

Smoot, Stephen W. (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S281000, C438S467000, C257S379000, C257S529000

Reexamination Certificate

active

06911360

ABSTRACT:
An active fuse includes an active fuse geometry (120) that is used to form both a variable resistor (106) and a select transistor (110). In one embodiment, the active fuse geometry is formed in a portion of an active region (160) of a semiconductor substrate (140), and a select gate (124) is disposed over an end portion (123) of the active fuse geometry to form an integral select transistor (110) for use in programming the active fuse. The use of a shared active fuse geometry within the active region allows for reduced area requirements and improved sensing margins.

REFERENCES:
patent: 5291434 (1994-03-01), Kowalski
patent: 6229733 (2001-05-01), Male
patent: 6258700 (2001-07-01), Bohr et al.
patent: 6420217 (2002-07-01), Kalnitsky et al.
patent: 2002/0105050 (2002-08-01), Hagiwara et al.
Stanley Wolf, “Silicon Processing for the VLSI Era—vol. 2: Process Integration,” Lattice Press, Sunset Beach, California (1990), pp. 354-356.
Stanley Wolf and Richard N. Tauber, “Silicon Processing for the VLSI Era—vol. 1: Process Technology,” Lattice Press, Sunset Beach, California (1986), pp. 397-399.

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