Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2009-12-10
2010-11-23
Tabone, Jr., John J (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S724000, C714S727000, C714S729000, C714S731000, C713S400000, C713S501000
Reexamination Certificate
active
07840864
ABSTRACT:
A method and circuits for testing an integrated circuit at functional clock frequency by providing a test controller generating control signals that assure proper latching of test patterns in scan chains at tester frequency and propagation of the test pattern through logic circuits being tested at functional clock frequency.
REFERENCES:
patent: 6467044 (2002-10-01), Lackey
patent: 6763489 (2004-07-01), Nadeau-Dostie et al.
patent: 7058866 (2006-06-01), Flanagan et al.
patent: 7185249 (2007-02-01), Tkacik et al.
Notice of Allowance (Mail Date Nov. 30, 2009) for U.S. Appl. No. 11/772,340, filed Jul. 2, 2007; Confirmation No. 9415.
Office Action (Mail Date Mar. 4, 2010) for U.S. Appl. No. 12/635,068, filed Dec. 10, 2009; Confirmation No. 8664.
Grise Gary D.
Oakland Steven F.
Polson Anthony D.
Stevens Philip S.
Cain David
International Business Machines - Corporation
Schmeiser Olsen & Watts
Tabone, Jr. John J
LandOfFree
Functional frequency testing of integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Functional frequency testing of integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Functional frequency testing of integrated circuits will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4240037