Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-10-30
2007-10-30
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S731000
Reexamination Certificate
active
10711075
ABSTRACT:
A method and circuits for testing an integrated circuit at functional clock frequency by providing a test controller generating control signals that assure proper latching of test patterns in scan chains at tester frequency and propagation of the test pattern through logic circuits being tested at functional clock frequency.
REFERENCES:
patent: 6467044 (2002-10-01), Lackey
patent: 7058866 (2006-06-01), Flanagan et al.
Grise Gary D.
Oakland Steven F.
Polson Anthony D.
Stevens Philip S.
Britt Cynthia
LeStrange Michael J.
Schmeiser Olsen & Watts
Tabone, Jr. John J.
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