Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-02-05
2000-06-27
Fahmy, Wael
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438436, 438437, H01L 2176
Patent
active
060806389
ABSTRACT:
A method to reduce to reduce DRAM capacitor STI junction leakage current. A Shallow Trench Isolation opening is formed, within this opening Field Oxide is deposited. The top surface of the FOX is etched down and a second layer of oxide is deposited over the FOX and the adjacent active regions. This second layer of oxide is etched bringing the top surface down to below the level of the top surface of the surrounding active areas but leaving spacers where the top surface of the FOX intersects with the active areas.
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Chiu Yuan-Horng
Jeng Shwangming
Lin Chung-Te
Thei Kong-Beng
Ackerman Stephen B.
Fahmy Wael
Pham Long
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
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