Process for making a buried bit line memory cell

Details Process for making a buried bit line memory cell Process for making a buried bit line memory cell

1994-08-09

1996-07-16

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 48, 437 69, H01L 2170

Patent

active

055366708

ABSTRACT:
A buried bit line memory cell and fabrication process are disclosed. A plurality of exposed windows of a semiconductor material are formed which are separated by mesas. An oxide region is then formed in the vicinity of each exposed surface window. The formed oxide regions encroach under the mesas and therefore cover and area which is greater than the original windows. The mesas are then removed to expose a second set of narrow windows of the surface of the semiconductor material separated by the oxide regions. Impurities are then implanted or diffused into the substrate through the second set of narrow surface windows to form doped regions. The doped regions are delineated by the edges of the oxide regions and are therefore narrower than the width of the mesas. At least some of the doped regions form the buried bit lines of the memory cells.

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