Formation of fully silicided (FUSI) gate using a dual...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S299000, C438S630000, C438S651000, C438S682000

Reexamination Certificate

active

11195994

ABSTRACT:
A method for forming a semiconductor device structure, comprising the steps of independently forming source/drain surface metal silicide layers and a fully silicided metal gate in a polysilicon gate stack. Specifically, one or more sets of spacer structures are provided along sidewalls of the polysilicon gate stack after formation of the source/drain surface metal silicide layers and before formation of the silicided metal gate, in order to prevent formation of additional metal silicide structures in the source/drain regions during the gate salicidation process. The resulting semiconductor device structure includes a fully silicide metal gate that either comprises a different metal silicide material from that in the source/drain surface metal silicide layers, or has a thickness that is larger than that of the source/drain surface metal silicide layers. The source/drain regions of the semiconductor device structure are devoid of other metal silicide structures besides the surface metal silicide layers.

REFERENCES:
patent: 6929992 (2005-08-01), Djomehri et al.
patent: 2006/0134844 (2006-06-01), Lu et al.

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