Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-01-24
2010-06-29
Loke, Steven (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S302000
Reexamination Certificate
active
07745287
ABSTRACT:
A nonvolatile memory device includes a semiconductor wall having an inclination angle and a gate electrode covered with the semiconductor wall. A pair of buried diffusion layers may be formed at a lower surface and upper surface formed by the semiconductor wall. A charge trap insulating layer may be sandwiched between the gate electrode and the semiconductor wall. The semiconductor wall between the buried diffusion layers may correspond to a channel of the memory device. In a method of fabricating the memory device, a pattern having a sidewall may be formed on a semiconductor substrate. A buried oxide layer may be formed at the upper surface and another buried oxide layer may be formed at the lower surface. A charge trap insulating layer may be formed at the sidewall where the buried oxide layers are formed. A gate electrode may be formed on the charge trap insulating layer. A semiconductor substrate may be formed to form a trench, so that the sidewall may be obtained.
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Goodwin David
Harness Dickey & Pierce PLC
Loke Steven
Samsung Electronics Co,. Ltd.
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