Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2005-12-30
2009-02-03
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S185170, C365S189040
Reexamination Certificate
active
07486570
ABSTRACT:
Disclosed is a program method for a flash memory device which includes; storing data in a buffer memory and generating a high voltage as a word line voltage. When transmission of data to the buffer memory is complete, the program method simultaneously transfers data in the buffer memory to a page buffer circuit, and programs data in the page buffer circuit in a memory cell array according to the word line voltage.
REFERENCES:
patent: 5954828 (1999-09-01), Lin
patent: 6335881 (2002-01-01), Kim et al.
patent: 6366487 (2002-04-01), Yeom
patent: 7064986 (2006-06-01), Lee et al.
patent: 7072238 (2006-07-01), Chae et al.
patent: 2004/0027856 (2004-02-01), Lee et al.
patent: 2004/0264262 (2004-12-01), Ishimoto et al.
patent: 2005/0094478 (2005-05-01), Hosono et al.
patent: 2006/0279994 (2006-12-01), Park et al.
patent: 2001-229684 (2001-08-01), None
patent: 2003-045192 (2003-02-01), None
patent: 1020010081243 (2001-08-01), None
patent: 1020040004895 (2004-01-01), None
Jo Seong-Kue
Lee Jin-Yub
Park Dae-Sik
Elms Richard
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
Yang Han
LandOfFree
Flash memory device having reduced program time and related... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Flash memory device having reduced program time and related..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flash memory device having reduced program time and related... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4053085