Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2007-08-07
2007-08-07
Nguyen, Viet Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S185180, C365S185190, C365S185220, C365S185240, C365S185230
Reexamination Certificate
active
11356620
ABSTRACT:
There is provided a flash memory device with multi-level cell and a reading and programming method thereof. The flash memory device with multi-level cell includes a memory cell array, a unit for precharging bit line, a bit line voltage supply circuit for supplying a voltage to the bit line, and first to third latch circuits each of which performs different function from each other. The reading and programming methods are performed by LSB and MSB reading and programming operations. A reading method in the memory device is achieved by reading an LSB two times and by reading an MSB one time. A programming method is achieved by programming an LSB one time and programming an MSB one time. Data having multi-levels can be programmed into memory cells by two times programming operations.
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Kim Dong-Hwan
Lee Yeong-Taek
Marger & Johnson & McCollom, P.C.
Nguyen Viet Q.
Samsung Electronics Co,. Ltd.
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