Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1998-04-17
2001-05-01
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S396000, C438S253000, C438S722000
Reexamination Certificate
active
06225156
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention in general relates to the fabrication of layered superlattice materials and ABO
3
type metal oxides, and more particularly to a ferroelectric integrated circuit having low sensitivity to hydrogen exposure and to a method for fabricating such a circuit.
2. Statement of the Problem
Ferroelectric compounds possess favorable characteristics for use in nonvolatile integrated circuit memories. See Miller, U.S. Pat. No. 5,046,043. A ferroelectric device, such as a capacitor, is useful as a nonvolatile memory when it possesses desired electronic characteristics, such as high residual polarization, good coercive field, high fatigue resistance, and low leakage current. Lead-containing ABO
3
type ferroelectric oxides such as PZT (lead titanate zirconate) and PLZT (lanthanum lead titanate zirconate) have been studied for practical use in integrated circuits. Layered superlattice material oxides, have also been studied for use in integrated circuits. See Watanabe, U.S. Pat. No. 5,434,102. Layered superlattice material compounds exhibit characteristics in ferroelectric memories that are orders of magnitude superior to those of PZT and PLZT compounds. While prototypes of ferroelectric memories have been made successfully with the layered superlattice compounds, there is as yet no manufacturing process for making memories using either the ABO
3
type oxides or the layered superlattice material compounds with the desired electronic characteristics economically and in commercial quantities. One reason, among others, for the lack of economical commercial processes for the fabrication of high quality ferroelectric integrated circuits is that the metal oxide compounds are susceptible to reduction by hydrogen during hydrogen annealing. Hydrogen annealing is a common step during CMOS integrated circuit memory fabrication and results in degradation of some important ferroelectric properties. This is especially true for the layered superlattice material compounds, which are complex, layered oxides that are especially prone to degradation by hydrogen.
A typical ferroelectric memory device in an integrated circuit contains a semiconductor substrate and a metal-oxide semiconductor field-effect transistor (MOSFET) in electrical contact with a ferroelectric device, usually a ferroelectric capacitor. A ferroelectric capacitor typically contains a ferroelectric thin film located between a first, bottom electrode and a second, top electrode, the electrodes typically containing platinum. During manufacture of the circuit, the MOSFET is subjected to conditions causing defects in the silicon substrate. For example, the manufacturing process usually includes high energy steps, such as ion-mill etching and plasma etching. Defects also arise during heat treatment for crystallization of the ferroelectric thin film at relatively high temperatures, often in the range 500°-900° C. As a result, numerous defects are generated in the single crystal structure of the semiconductor silicon substrate, leading to deterioration in the electronic characteristics of the MOSFET.
To restore the silicon properties of the MOSFET/CMOS, the manufacturing process typically includes a hydrogen annealing step, in which defects such as dangling bonds are eliminated by utilizing the reducing property of hydrogen. Various techniques have been developed to effect the hydrogen annealing, such as H
2
-gas heat treatment in ambient conditions. Conventionally, hydrogen treatments are conducted between 350° and 550° C., typically around 450° C. for a time period of about 30 minutes. In addition, there are several other integrated circuit fabrication processes that expose the integrated circuit to hydrogen, often at elevated temperatures, such as CVD processes for depositing metals, and growth of silicon dioxide from silane or TEOS sources. During processes that involve hydrogen, the hydrogen diffuses through the top electrode and the side of the capacitor to the ferroelectric thin film and reduces the oxides contained in the ferroelectric material. The absorbed hydrogen also metallizes the surface of the ferroelectric thin film. The adhesivity of the ferroelectric thin film to the upper electrode is lowered by the chemical change taking place at the interface. Alternatively, the upper electrode is pushed up by the oxygen gas, water, and other products of the oxidation-reduction reactions taking place. As a result of these effects, the electronic properties of the capacitor are degraded, and peeling is likely to take place at the interface between the top electrode and the ferroelectric thin film. These problems are acute in ferroelectric memories containing layered superlattice compounds because these oxide compounds are particularly complex and prone to degradation by hydrogen-reduction.
3. Solution to the Problem
The invention solves the above problems by providing an integrated circuit and a method for fabricating metal oxide elements in integrated circuits that reduce the detrimental effects of the hydrogen and preserve the favorable electronic properties of the metal oxide element.
One aspect of the invention is formation of a hydrogen barrier layer to cover a protected portion of the metal oxide element.
In a preferred method, a nitride of titanium or silicon is formed to cover the protected portion of the metal oxide element and serve as a hydrogen barrier.
A further aspect of the invention is the formation of a ferroelectric capacitor with a top electrode, a metal oxide thin film and a bottom electrode, such that a portion of the underlying metal oxide layer and of the bottom electrode extend laterally beyond the edge of the top electrode. A hydrogen barrier layer is formed directly over at least a portion of the top electrode and a protected segment of the metal oxide thin film. The metal oxide thin film comprises a sacrificial segment, which preferably is that portion of the metal oxide thin film not directly under the hydrogen barrier layer. After completion of the fabrication steps in which hydrogen damage to the metal oxide can occur, at least part of the sacrificial segment of the metal oxide thin film may be removed by being etched down to the bottom electrode. In a preferred embodiment, the hydrogen barrier layer is patterned with the top electrode layer in the same patterning process, forming a self-aligned top electrode and hydrogen barrier.
A further aspect of the invention is metal oxide material that comprises a metal oxide compound containing at least two metals.
A further aspect of the invention is a thin film of metal oxide material containing a layered superlattice compound. In one embodiment of the invention, the layered superlattice compound comprises strontium bismuth tantalum niobate. A further aspect of the invention is forming a ferroelectric element having layered superlattice compounds containing the chemical elements bismuth, strontium, niobium and tantalum in which the relative amounts of the chemical elements are selected to minimize the degradation of electronic properties by hydrogen.
A further aspect of the invention is forming metal oxide material in which at least one of the constituent metals is present in stoichiometrically excess amounts to form separate metal oxides in the metal oxide material.
In one embodiment, the layered superlattice compound comprises strontium bismuth tantalum niobate, and it contains an excess amount of at least one of the metals from the group comprising bismuth and niobium.
A further aspect of the invention is performing a hydrogen heat treatment of the ferroelectric integrated circuit at a temperature not greater than 400° C., for a time period not greater than 30 minutes in a hydrogen atmosphere containing 0.01 to 50 percent mole fraction of hydrogen.
Numerous other features, objects and advantages of the invention will become apparent from the following description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 5434102 (1995-07-01), Watanabe et al.
patent: 5439845 (1995-08-
Cuchiaro Joseph D.
Furuya Akira
Miyasaka Yoichi
Paz De Araujo Carlos A.
Abbott Barbara E.
Duft, Graziano & Forest, P.C.
Fourson George
Symetrix Corporation
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