Feedback shift register control

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C377S072000

Reexamination Certificate

active

07734969

ABSTRACT:
Feedback shift register control circuit including a checking circuit having an input being coupled to a seed input of a feedback shift register or to an internal node of the feedback shift register, the checking circuit configured to be responsive to a signal at the input indicating that the feedback shift register is in a not-allowed state, or is going to assume a not-allowed state to output an exception signal; and a gate circuit being coupled to the seed input or the feedback shift register and configured to be responsive to the exception signal to change the state of the feedback shift register or seed the feedback shift register such that the feedback shift register assumes an allowed state.

REFERENCES:
patent: 5383143 (1995-01-01), Crouch et al.
patent: 5719913 (1998-02-01), Maeno
patent: 5966313 (1999-10-01), Sakamoto
patent: 6728740 (2004-04-01), Kelly et al.
patent: 6944734 (2005-09-01), Anzai et al.
patent: 7461312 (2008-12-01), Tardif et al.
patent: 7516169 (2009-04-01), Collier

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