Fabrication process for MOSFET devices and a reproducible capaci

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438239, 438233, H01L 218238, H01L 218242

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active

057926816

ABSTRACT:
A process has been developed in which a capacitor structure can be simultaneously fabricated with NFET and PFET to be used in EEPROM, SRAM or DRAM cells. The process features the use of a silicon nitride layer, protecting an underlying capacitor dielectric layer from an oxidation ambient, presented during a subsequent NFET source and drain drive-in procedure.

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patent: 5401678 (1995-03-01), Jeong et al.
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patent: 5633181 (1997-05-01), Hayashi

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