Fabrication method of a tantalum pentoxide dielectric layer for

Details Fabrication method of a tantalum pentoxide dielectric layer for Fabrication method of a tantalum pentoxide dielectric layer for

1999-06-24

2000-10-17

Fahmy, Wael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

257310, 438785, 438239, 438393, 438396, H01L 218242, H01L 2120, H01L 2131, H01L 21469, H01L 27108

Patent

active

061330868

ABSTRACT:
A method of fabricating a dielectric layer for a dynamic random access memory capacitor is described in which a tantalum pentoxide layer is deposited on the polysilicon storage electrode, followed by a two-step treatment on the tantalum pentoxide layer. The first treatment step includes a remote oxygen plasma or an ultraviolet-ozone treatment, followed by a spike annealing second treatment step.

REFERENCES:
patent: 5374578 (1994-12-01), Patel et al.
patent: 5440157 (1995-08-01), Imai et al.
patent: 5468687 (1995-11-01), Carl et al.
patent: 5677015 (1997-10-01), Hasegawa

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