Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-09-18
2007-09-18
Sarkar, Asok K. (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S202000, C438S183000, C438S926000, C257SE21632
Reexamination Certificate
active
11240839
ABSTRACT:
A method including forming a hard mask and an etch stop layer over a sacrificial material patterned as a gate electrode, wherein a material for the hard mask and a material for the etch stop layer are selected to have a similar stress property; removing the material for the hard mask and the material for the etch stop layer sufficient to expose the sacrificial material; replacing the sacrificial material with another material. A system including a computing device including a microprocessor, the microprocessor including a plurality of transistor devices, at least one of the plurality of transistor devices including a gate electrode formed on a substrate surface; a discontinuous etch stop layer conformally formed on the substrate surface and adjacent side wall surfaces of the gate electrode; and a dielectric material conformally formed over the etch stop layer.
REFERENCES:
patent: 6346450 (2002-02-01), Deleonibus et al.
patent: 2005/0148130 (2005-07-01), Doczy et al.
patent: 2006/0214241 (2006-09-01), Pidin
Barns Chris E.
Brask Justin K.
Prince Matthew J.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Sarkar Asok K.
Yevsikov Victor V.
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