Epitaxially coated silicon wafer and method for producing...

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate

Reexamination Certificate

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C257SE21102

Reexamination Certificate

active

07935614

ABSTRACT:
A multiplicity of silicon wafers polished at least on their front sides are provided and successively coated individually in an epitaxy reactor by a procedure whereby one of the wafers is placed on a susceptor in the epitaxy reactor, is pretreated under a hydrogen atmosphere at a first hydrogen flow rate, and with addition of an etching medium to the hydrogen atmosphere at a reduced hydrogen flow rate in a second step, is subsequently coated epitaxially on its polished front side, and removed from the reactor. An etching treatment of the susceptor follows a specific number of epitaxial coatings. Silicon wafers produced thereby have a global flatness value GBIR of 0.07-0.3 μm relative to an edge exclusion of 2 mm.

REFERENCES:
patent: 4874464 (1989-10-01), Goodwin et al.
patent: 5400548 (1995-03-01), Huber et al.
patent: 6030887 (2000-02-01), Desai et al.
patent: 6277715 (2001-08-01), Takeno et al.
patent: 6478883 (2002-11-01), Tamatsuka et al.
patent: 6610213 (2003-08-01), Schwab et al.
patent: 6899762 (2005-05-01), Wenski et al.
patent: 2001/0032581 (2001-10-01), Wilson et al.
patent: 2001/0039917 (2001-11-01), Arai et al.
patent: 2002/0022351 (2002-02-01), Schmolke et al.
patent: 2002/0187728 (2002-12-01), Kiuchi et al.
patent: 2003/0068502 (2003-04-01), Togashi et al.
patent: 2003/0104222 (2003-06-01), Ono et al.
patent: 2003/0175532 (2003-09-01), Asayama et al.
patent: 2004/0005777 (2004-01-01), Qu et al.
patent: 2004/0065250 (2004-04-01), Komiya et al.
patent: 2004/0089225 (2004-05-01), Ono et al.
patent: 2004/0115941 (2004-06-01), Siebert et al.
patent: 2004/0135208 (2004-07-01), Tanahashi et al.
patent: 2004/0241992 (2004-12-01), Kono et al.
patent: 2005/0087830 (2005-04-01), Takeno
patent: 2005/0160971 (2005-07-01), Otsuka
patent: 2006/0097355 (2006-05-01), Bauer et al.
patent: 2006/0201413 (2006-09-01), Nishizawa
patent: 19833257 (1999-09-01), None
patent: 19938340 (2001-02-01), None
patent: 10025871 (2001-12-01), None
patent: 10316214 (2004-11-01), None
patent: 272531 (1988-06-01), None
patent: 547894 (1993-06-01), None
patent: 580162 (1994-01-01), None
patent: 05144751 (1993-06-01), None
patent: 2001168046 (2001-06-01), None
patent: 2002043230 (2002-02-01), None
patent: 2003 163216 (2003-06-01), None
patent: 2003 309707 (2003-10-01), None
patent: 2003 318109 (2003-11-01), None
patent: 2004 175658 (2004-06-01), None
patent: 165489 (2004-06-01), None
patent: 2004 335528 (2004-11-01), None
patent: 2004 356416 (2004-12-01), None
patent: 2005 011880 (2005-01-01), None
patent: 2005 39111 (2005-02-01), None
patent: 2005 197278 (2005-07-01), None
patent: 1227286 (1988-08-01), None
patent: 1228549 (2005-03-01), None
patent: 03044845 (2003-05-01), None
patent: 2005001916 (2005-01-01), None

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