Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-04-25
2006-04-25
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S179000, C438S585000, C438S595000, C257S344000, C257S408000
Reexamination Certificate
active
07033897
ABSTRACT:
The present invention pertains to formation of a transistor in a manner that mitigates parasitic capacitance, thereby facilitating, inter alia, enhanced switching speeds. More particularly, a sidewall spacer formed upon a semiconductor substrate adjacent a conductive gate structure includes a material having a low dielectric constant (low-k) to mitigate parasitic capacitance between the gate structure, the sidewall spacer and a conductive drain formed within the semiconductor substrate. The low-k sidewall spacer is encapsulated within a nitride material which is selective to etchants such that the spacer is not altered during subsequent processing. The spacer thus retains its shape and remains effective to guide dopants into desired locations within the substrate.
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Chen Yuanning
Kirmse Karen H.
Rotondaro Antonio L. P.
Brady III W. James
Louie Wai-Sing
McLarty Peter K.
Pham Long
Telecky , Jr. Frederick J.
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