Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
1999-10-19
2003-01-21
Kunemund, Robert (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S691000, C438S692000, C438S693000, C438S657000
Reexamination Certificate
active
06509269
ABSTRACT:
TECHNICAL FIELD
The present invention relates to aluminum (Al) and/or Al alloy metalization in semiconductor devices with improved planarity. The present invention is applicable to chemical mechanical polishing (CMP) Al and Al alloy surfaces in manufacturing high-speed integrated circuits.
BACKGROUND ART
Conventional semiconductor devices comprise a semiconductor substrate, typically doped monocrystalline silicon, and a plurality of sequentially formed interlayer dielectrics and conductive patterns. An integrated circuit is formed containing a plurality of conductive patterns comprising conductive lines separated by interwiring spacings, and a plurality of interconnect lines, such as bus lines, bit lines, word lines and logic interconnect lines. Typically, the conductive patterns on different layers, i.e., upper and lower layers, are electrically connected by a conductive plug filling a via hole, while a conductive plug filling a contact hole establishes electrical contact with an active region on a semiconductor substrate, such as a source/drain region. Conductive lines are formed in trenches which typically extend substantially horizontal with respect to the semiconductor substrate. Semiconducted “chips” comprising five or more levels of metalization are becoming more prevalent as device geometries shrink into the deep submicron level.
In manufacturing multi-layer semiconductor devices, a metal layer, such as Al or an Al alloy, is deposited into an opening in a dielectric interlayer and the surface planarized, as by CMP, to obtain a substantially planar surface. In conventional CMP techniques, a wafer carrier assembly is rotated in contact with a polishing pad in a CMP apparatus. The polishing pad is mounted on a rotating turntable or platen or moving above a stationary polishing table driven by an external driving force. The wafers are typically mounted on a carrier or polishing head which provides a controllable pressure urging the wafers against the rotating or linearly moving polishing pad. The CMP apparatus effects polishing or rubbing movement between the surface of each thin semiconductor wafer and the polishing pad while dispensing a polishing slurry containing abrasive particles in a reactive solution to effect both chemical activity and mechanical activity while applying a force between the wafer and the polishing head.
Conventional polishing pads employed in abrasive slurry processing typically comprise a grooved porous polymeric surface, such as polyeurathane, and the abrasive slurry varied in accordance with the particular material undergoing CMP. Basically, the abrasive slurry is impregnated into the pores of the polymeric surface while the grooves convey the abrasive slurry to the wafer undergoing CMP. Typically CMP is performed not only on a silicon wafer itself, but on various dielectric layers, such as the silicon oxide, conductive layers, such as Al and copper, or a layer containing both conductive and dielectric materials, as in damascene processing.
As the drive for miniaturization proceeds apace,it becomes increasingly critical to obtain surfaces with a high degree of planarity to avoid challenging the depth of focus limitations of conventional photolithographic techniques, particularly with respect to achieving submicron dimensions, such as below about 0.25 micron. During the CMP polishing process, however, the polishing surface of the polishing pad undergoes changes. Such changes are believed to be caused by, inter alia, spent slurry accumulating in the pores of the polishing pad and the compression of the surface of the polishing pad due to the loading of the substrate against the pad. The accumulation of spent slurry in the porous polishing surface in combination with the compression of the pad surface creates a “glazed” condition on the pad. A glazed pad typically has a lower coefficient of friction and, hence, exhibits a substantially lower material removal rate than that of a fresh or un-glazed polishing pad. When the removal rate of the polishing pad is reduced, the time required to polish a substrate increases, thereby reducing production throughput. A key factor in achieving consistent polishing of substrates is the condition of the surface of the polishing pad. In addition, a glazed pad surface causes scratching on the wafer surface. Accordingly, conventional practices comprise conditioning a conventional polishing pad, such as model IC1000 or SuboIV of a woven polyeurathane material available from Rodel Company, Newark, Del., using a conditioning tool. See, for example, Shendon et. al., U.S. Pat. No. 5,775,983. Scrovan in U.S. Pat. No. 5,645,682 discloses the use of a conditioning solution which is dispensed onto the planarizing surface while a semiconductor wafer is planarized. A conventional polishing slurry is disclosed by Scherber et. al. in U.S. Pat. No. 5,858,813, which slurry is designed for polishing silicon dioxide and comprises a surfactant. Huynh et. al. in U.S. Pat. No. 5,704,987 disclose a basic polishing solution containing a non-ionic polymeric surfactant. Muroyama in U.S. Pat. No. 5,709,588 discloses a basic polishing slurry for silicon dioxide which comprises at least a carboxyl group containing material, an amino group containing material and a sulfonic acid group containing material.
Pad glazing during CMP of Al and Al alloys poses a severe impediment to production throughput. For example, every minute of CMP for Al and Al alloys requires two minutes of pad conditioning to remove pad glazing. Such pad conditioning has typically been conducted by employing a megasonic pad rinse and ex-situ treatment with a diamond disk. In addition to consuming a large amount of time, megasonic nozzles are quite expensive.
There exists a need for methodology enabling the planarization of Al and/or Al alloys using CMP with reduced pad glazing. There exists a particular need for methodology enabling CMP of Al and/or Al alloys at high production throughput by eliminating or substantially reducing pad glazing.
SUMMARY OF THE INVENTION
An advantage of the present invention is a method of planarizing Al and Al alloys by CMP at high production throughput with no or significantly reduced pad glazing.
Additional advantages and other features of the present invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the present invention. The advantages of the present invention may be realized and obtained as particularly pointed out in the appended claims.
According to the present invention, the foregoing and other advantages are achieved in part by a method of planarizing an Al or Al alloy surface, the method comprising CMP the surface with a polishing pad employing a substantially neutral pH slurry containing alumina abrasive (Al
2
0
3
) particles and a surfactant in an amount sufficient to prevent the Al
2
0
3
particles from agglomerating with aluminum hydroxide (Al(OH)
3
)-containing CMP by-products.
Embodiments of the present invention further comprise ex situ conditioning the polishing pad surface by treating the polishing pad surface with a chemical to dissolve or bind with and remove Al(OH)
3
—containing CMP by-products. Embodiments of the present invention comprise CMP with a slurry containing about 0.02 to about 5 wt. % of a non-ionic surfactant and ex situ polishing pad conditioning employing a chemical agent comprising deionized water and an acid, such as sulfuric acid, a base, such as potassium hydroxide, or a complexing agent capable of binding with Al(OH)
3
.
REFERENCES:
patent: 5527423 (1996-06-01), Neville et al.
patent: 5626509 (1997-05-01), Hayashi
patent: 5645682 (1997-07-01), Skrovan
patent: 5704987 (1998-01-01), Huynh et al.
patent: 5709588 (1998-01-01), Muroyama
patent: 5752875 (1998-05-01), Ronay
patent: 5775983 (1998-07-01), Shendon et al.
patent: 5858813 (1999-01-01), Scherber et al.
patent: 5866031 (1999-02-01), Carpio et al.
patent: 5913715 (1999-06-01), Kirchner
Li Shijian
Redeker Fred C.
Sun Lizhong
Applied Materials Inc.
Kunemund Robert
Moser Patterson & Sheridan
Tran Binh X.
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