Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-03-24
2008-10-21
Ton, David (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S727000, C714S726000
Reexamination Certificate
active
07441171
ABSTRACT:
Disclosed is a method of inserting scan elements onto scan chains of broadcast scan structures to minimize the number of collisions in a plurality of logic cones. Each logic cone is selected and evaluated to identify all of the scan elements that provide inputs thereto. The identified scan elements are systematically inserted into the scan chains in the broadcast scan structure in a manner that minimizes insertion of multiple scan elements into the same sequential position on different scan chains that receive a test pattern from the same scan-in pin. If possible, the elements are inserted into the same scan chain or into scan chains that fan out from different pins. Optionally, if multiple elements are inserted at the same sequential position in scan chains that fan out from the same pin, these multiple elements can be marked so that they will not be used for test generation, thereby, completely eliminating bit collisions
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Gibb & Rahman, LLC
International Business Machines - Corporation
Kotulak, Esq. Richard M.
Ton David
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