Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2007-02-20
2007-02-20
Nguyen, Van Thu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S189040, C365S189090, C365S191000
Reexamination Certificate
active
10377297
ABSTRACT:
An efficient method and electronic circuit for initializing latch arrays in an electronic device including an FPGA and a memory device includes a group of one or more data latches, each including a pair of cross-coupled inverting logic elements, characterized in that it includes a means for simultaneously initializing each data latch to a predetermined logic state, without requiring significant additional circuitry.
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Agarwal Manish
Bal Ankur
Graybeal Jackson Haley LLP
Han J. Mark
Jorgenson Lisa K.
Luu Pho M.
Nguyen Van Thu
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