Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2005-08-02
2005-08-02
Zarabian, Amir (Department: 2822)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S697000, C257S758000, C257S760000
Reexamination Certificate
active
06924238
ABSTRACT:
A new method and structure is provided for the polishing of the surface of a layer of low-k dielectric material. Low-k dielectric material of low density and relatively high porosity is combined with low-k dielectric material of high density and low porosity whereby the latter high density layer is, prior to polishing of the combined layers, deposited over the former low density layer. Polishing of the combined layers removes flaking of the polished low-k layers of dielectric. This method can further be extended by forming conductive interconnects through the layers of dielectric, prior to the layer of dielectric.
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Chen Ying-Ho
Chou Tzu-Jen
Jang Syun-Ming
Lee Shen-Nan
Haynes and Boone LLP
Novacek Christy
Taiwan Semiconductor Manufacturing Company , Ltd.
Zarabian Amir
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