Dynamic type semiconductor monolithic memory

Details Dynamic type semiconductor monolithic memory Dynamic type semiconductor monolithic memory

1982-03-16

1985-03-05

Richardson, Robert L.

Static information storage and retrieval

Read/write circuit

Precharge

365204, 365189, G11C 700, G11C 1140

Patent

active

045035229

ABSTRACT:
A dynamic type semiconductor memory using MOS transistors, in which first and second booster circuits utilizing capacitances, respectively, are provided at each of stages preceding and succeeding to a word driver, respectively. Data lines of the memory are each provided with a voltage compensating circuit for increasing a voltage for charging a memory cell to a level higher than a source voltage for being rewritten in the memory cell. A first boosting circuit is operated after a word line driving pulse signal is produced. Subsequently, word driver selecting transistors are turned off, which is followed by operation of the second booster circuit. Thus, the word line voltage is boosted twice.

REFERENCES:
patent: 4078261 (1978-03-01), Millhollan et al.
patent: 4112508 (1978-09-01), Ithoh
patent: 4404661 (1983-09-01), Nagayama et al.

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