Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-01-27
2009-08-18
Smith, Bradley K (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE27064
Reexamination Certificate
active
07576395
ABSTRACT:
Integrated circuit devices include a semiconductor substrate having a first doped region and a second doped region having a different doping type than the first doped region. A gate electrode structure on the semiconductor substrate extends between the first and second doped regions and has a gate insulation layer of a first high dielectric constant material in the first doped region and of a second high dielectric constant material, different from the first high dielectric constant material, in the second doped region. A gate electrode is on the gate insulation layer.
REFERENCES:
patent: 6271115 (2001-08-01), Liu et al.
patent: 6518106 (2003-02-01), Ngai et al.
patent: 6528858 (2003-03-01), Yu et al.
patent: 6545324 (2003-04-01), Madhukar et al.
patent: 6617210 (2003-09-01), Chau et al.
patent: 2002/0190302 (2002-12-01), Bojarczuk, Jr. et al.
patent: 2003/0082863 (2003-05-01), Lim et al.
patent: 2003/0119292 (2003-06-01), Lee et al.
patent: 2003/0122199 (2003-07-01), Koyama et al.
patent: 2004/0099916 (2004-05-01), Rotondaro et al.
patent: 2005/0064663 (2005-03-01), Saito
patent: 2005/0067704 (2005-03-01), Kaneko et al.
patent: 2005/0280104 (2005-12-01), Li
patent: 10 2005 024 417 (2006-02-01), None
patent: 10-0516991 (2003-12-01), None
Cellere et al. “Heavy ion irradiation of Floating Gate memory cells”IEEE Conference on Integrated Circuit Design and Technology187- (2004).
Min et al. “Low-Frequency Noise in Submicrometer MOSFETs With HfO2/Al2O3and HfAlOxGate Stacks”IEEE Transactions on Electron Devices51(10):1679-1687 (2004).
Okada et al. “Model for Dielectric Breakdown Mechanism of HfAlOx/SiO2Stacked Gate Dielectrics Dominated by the Generated Subordinate Carrier Injection”IEEE30.3.1-30.3.4 (2004).
Sim et al. “Hot carrier stress study in Hf-silicate NMOS transistors”IRW Final Report136-140 (2004).
Wang et al. “Electrical Performance Improvement in SiO2/HfSiO High-k Gate Stack for Advanced Low Power Device Application”IEEE International Conference on Integrated Circuit Design and Technology283-286 (2004).
Notice to Submit Response in Korean Application No. 10-2005-0032033; Date of mailing Jun. 8, 2006.
English translation of Notice to Submit Response in Korean Application No. 10-2005-0032033; Date of mailing Jun. 8, 2006.
English translation of Notice to Submit Response in Korean Application No. 10-2005-0032033; Date of mailing Dec. 22, 2006.
Koyama et al., “Effects of Nitrogen in HfSiON Gate Dielectric on the Electrical and Thermal Characteristics”, IEEE International Electron Device Meeting, 2002 Technical Digest, Dec. 11, 2002, pp. 849-852.
Morioka et al., “High mobility MISFET with low trapped charge in HFSiO films,” 2003 Symposium on VLSI Digest of Technical Papers, Jun. 10-12, 2003, pp. 165-166.
Jung et al., “Improved Current Performance of CMOSFETs with Nitrogen Incorporated HfO2-Al2O3Laminate Gate Dielectric,” IEEE International Electron Device Meeting 2002, Dec. 8-11, 2002, pp. 853-856.
Ota et al., Comparative Study of Carrier Mobility and Threshold Voltage between N- and P-MOSFETs in TaN Gate CMOS with EOT=1.5-2 HfAlOx, International Workshop on Gate Insulator 2003, Nov. 6-7, 2003, pp. 158-163.
Office Action for German Patent Application No. 10 2005 014 619.8-33; Date of mailing Aug. 17, 2006.
Yeo et al “Effects of High-kGate Dielectric Materials on Metal and Silicon Gate Workfunctions”IEEE Electron Devices Letters23(6):342-344.
Office Action not submitted.
Choi Jae-Kwang
Jung Hyung-Suk
Lee Jong-Ho
Rhee Hwa-Sung
Movva Amar
Myers Bigel Sibley & Sajovec P.A.
Samsung Electronics Co,. Ltd.
Smith Bradley K
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