Dual fully-silicided gate MOSFETs

Details Dual fully-silicided gate MOSFETs Dual fully-silicided gate MOSFETs

2005-06-14

2005-06-14

Smith, Matthew (Department: 2825)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S197000, C438S682000, C438S630000, C438S592000, C438S664000, C438S305000, C438S303000, C438S286000, C438S301000, C438S224000, C438S229000, C438S230000, C438S231000, C257S757000, C257S250000, C257S407000, C257S408000

Reexamination Certificate

active

06905922

ABSTRACT:
A semiconductor device having a plurality of silicidation steps is provided. In the preferred embodiment in which the semiconductor device is a MOSFET, the source/drain regions are silicided. A dielectric layer is formed and the etch stop layer is removed from the gate electrode of the MOSFET. A second silicidation process is performed to silicide the gate electrode. The process may be performed individually for each transistor, allowing the electrical characteristics of each transistor to be determined individually.

REFERENCES:
patent: 6008141 (1999-12-01), Ibara et al.
patent: 6037233 (2000-03-01), Liu et al.
patent: 6074915 (2000-06-01), Chen et al.
patent: 6103610 (2000-08-01), Blair
patent: 6136705 (2000-10-01), Blair
patent: 6150243 (2000-11-01), Wieczorek et al.
patent: 6204103 (2001-03-01), Bai et al.
patent: 6232227 (2001-05-01), Mikagi
patent: 6465309 (2002-10-01), Xiang et al.
patent: 6475874 (2002-11-01), Xiang et al.
patent: 6518154 (2003-02-01), Buynoski et al.
patent: 6610564 (2003-08-01), Fukada et al.
patent: 6620718 (2003-09-01), Wieczorek et al.
patent: 6642119 (2003-11-01), Pelella et al.
patent: 2001/0009791 (2001-07-01), Ahmad et al.
patent: 2002/0197804 (2002-12-01), Ahmad et al.
patent: 2004/0065930 (2004-04-01), Lin et al.
Tavel, B., et al., “Totally Silicided (CoSi2) Polysilicon: A Novel Approach To Very Low-Resistive Gate (˜2Ω/□) Without Metal CMP Nor Etching)” IEDM (Mar. 2001) pp. 825-828.
Maszara, W.P., et al., “Transistors With Dual Work Function Metal Gates By Single Full Silicidation (FUSI) Of Polysilicon,” IEDM (Feb. 2002) pp. 367-370.

Affiliated with

Also associated with

Rating

Dual fully-silicided gate MOSFETs does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual fully-silicided gate MOSFETs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual fully-silicided gate MOSFETs will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3482754