Dry process for post oxide etch residue removal

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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Details

C438S425000, C438S906000, C438S707000

Reexamination Certificate

active

06727185

ABSTRACT:

FIELD OF THE INVENTION
The invention is generally related to the field of post-etch residue removal in semiconductor fabrication and more specifically to a dry process for post-etch residue removal.
BACKGROUND OF THE INVENTION
In semiconductor fabrication, layers are routinely patterned with photoresist and subsequently etched to create patterned structures. One example is a via etch in which a via or hole is etched through an interlevel dielectric to an underlying metal interconnect layer. A photoresist stripping process is then used to remove the photoresist pattern. The etch and strip processes leave residue on the surface of the structure. A cleanup process is then required to remove the residue.
In optimizing a process for residue cleanup, four types of residues are distinguishable, and appear to require some changes in process parameters in order to most efficiently remove the residues. The first type of residue is referred to as “edge” residue. Edge residue is found around the perimeter of the wafer and is comprised of photoresist scum that is not exposed to the in situ ash process due to a wafer clamping mechanism. A second type of residue is referred to as “surface” residue. Surface residue is observable around vias and other patterned structures. The residue is unreactive with typical photoresist strip processes, and therefore remains after the strip process, whether or not the strip is in situ or ex situ with the dielectric etch process. The residue can be difficult to remove once it has been exposed to the ambient. A third type of residue is referred to as “feature” residue. Feature residue forms during the dielectric reactive ion etch (RIE) process and may cling to the sides of the feature or may accumulate at the bottom of the feature. For vias, when this type of residue is abundant, it can lead to a “stop etch” condition, in which the process conditions produce a polymer plug inside of the via rather than etching through the oxide interlevel dielectric layer. The fourth type of residue is referred to as a “field” residue. The field residue may be similar to the surface residue in quantity and composition. The field residue may differ from surface residue, because surface residue may incorporate more etch products due to its closer proximity to pattered areas compared with field locations. The residue may, therefore, be more difficult to remove for surface compared with field locations.
As device features of integrated circuits become smaller, currently used wet cleans become less effective in removing via or other feature residue. The fluid dynamics and surface tension properties of the liquids currently used limit their applicability to lower aspect ratio conditions compared with dry cleanup processes. Accordingly, an improved residue cleanup process is desired as aspect ratio requirements of the etch and cleanup move to more challenging feature sizes (larger aspect ratios).
SUMMARY OF THE INVENTION
The invention is a cleanup process that uses a dilute fluorine in oxygen chemistry in a downstream plasma tool to remove organic and inorganic polymeric residues. The cleanup process may remove undesired material and/or modify the exposed surface, thereby enhancing the desired properties of that surface.
An advantage of the invention is providing a cleanup process that offers simultaneous removal of both organic and inorganic residues using a dry (solvent-free) process.


REFERENCES:
patent: 5780359 (1998-07-01), Brown et al.
patent: 5824604 (1998-10-01), Bar-Gadda
patent: 5849639 (1998-12-01), Molloy et al.
patent: 6008129 (1999-12-01), Graff et al.
patent: 6080680 (2000-06-01), Lee et al.
patent: 6107192 (2000-08-01), Subrahmanyan et al.
patent: 6217704 (2001-04-01), Kitagawa

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