Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-08-14
2007-08-14
Lamarre, Guy (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S719000
Reexamination Certificate
active
11020001
ABSTRACT:
A driver IC including: a plurality of output pads; and a plurality of signal switch circuits, each of the signal circuits being provided on one of signal paths respectively connected to the output pads, wherein each of the signal switch circuits switches between a first state (or a use state) in which a signal from an upstream side of the signal path is allowed to pass through the signal switch circuit and a second state (or an inspection state) in which a level pattern of signals from the output pads is fixed to an inspection level pattern, according to a control signal.
REFERENCES:
patent: 2002/0158832 (2002-10-01), Park et al.
patent: 2003/0028836 (2003-02-01), Maeda et al.
patent: 2005/0035805 (2005-02-01), Tanada
patent: 06-186279 (1994-07-01), None
patent: 10/213616 (1998-08-01), None
patent: 2000-055988 (2000-02-01), None
Guerrier Merant
Harness & Dickey & Pierce P.L.C.
Lamarre Guy
Seiko Epson Corporation
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