DRAM cell capacitor and method for manufacturing the same

Details DRAM cell capacitor and method for manufacturing the same DRAM cell capacitor and method for manufacturing the same

1998-09-04

2000-01-11

Dutton, Brian

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438255, 438396, 438398, H01L 218242

Patent

active

060135492

ABSTRACT:
A DRAM cell capacitor is provided wherein a capacitor bottom electrode has an HSG (Hemi-Spherical Grain) layer formed thereon so as to increase capacitance of the capacitor. In the DRAM cell capacitor, the capacitor bottom electrode has an angled shape at a top edge thereof, and the HSG silicon layer is not formed on the top edge of the capacitor bottom electrode. A method for manufacturing the DRAM cell capacitor comprises etching an upper portion of the conductive layer using the photoresist pattern as a mask, and at the same time forming a polymer on both sidewalls of the photoresist pattern to etch the upper portion thereof and thereby to make a top edge of the conductive layer be angled. The method further comprises etching a remaining portion of the conductive layer sing a combination of the photoresist pattern and the polymer as a mask until an upper surface of the interlayer insulating layer is exposed, to thereby form the capacitor bottom electrode.

REFERENCES:
patent: 5733820 (1998-03-01), Adachi et al.
patent: 5851877 (1998-12-01), Ho et al.
patent: 5858834 (1999-01-01), Hirota et al.

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