Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate
2006-10-24
2006-10-24
Chang, Daniel D. (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
C327S291000, C331S057000
Reexamination Certificate
active
07126380
ABSTRACT:
A distributed clock generator for a semiconductor device. In one embodiment, the clock generator is not localized in one particular location on the semiconductor die and then distributed, but instead the clock generation itself is distributed throughout the integrated circuit. The clock generator itself is a CMOS phase shift oscillator which uses a series resistance and a capacitance to ground. Phase shift elements utilize the phase shift of distributed transmission lines around the integrated circuit die and are thus conveniently implemented using the series resistance and parallel capacitance of the transmission lines.
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Chang Daniel D.
Micro)n Technology, Inc.
Wong Cabello Lutsch Rutherford and Brucculeri LLP
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