Discontinuity prevention for SiGe deposition

Details Discontinuity prevention for SiGe deposition Discontinuity prevention for SiGe deposition

2005-06-28

2005-06-28

Picardat, Kevin M. (Department: 2822)

Semiconductor device manufacturing: process

Forming bipolar transistor by formation or alteration of...

Having heterojunction

C438S314000, C438S320000

Reexamination Certificate

active

06911369

ABSTRACT:
The present disclosure provides a process for producing a SiGe layer in a bipolar device having a reduced amount of gaps or discontinuities on a shallow trench isolation (STI) region use for a base electrode connection. The process is used for forming an SiGe layer for use in a semiconductor device. The process includes doping a single crystal substrate with a first dopant type, baking the doped single crystal substrate at a temperature less than 900° C., and at a pressure less than 100 torr; and depositing the SiGe layer on the baked single crystal substrate (epi SiGe) to serve as the base electrode and on the STI region (poly SiGe) to serve as a connection for the base electrode. The semiconductor device is thereby created from the combination of the doped single crystal substrate and the deposited SiGe layer.

REFERENCES:
patent: 6288427 (2001-09-01), Huang
patent: 6362065 (2002-03-01), Swanson et al.
patent: 6437376 (2002-08-01), Ozkan
patent: 6444591 (2002-09-01), Schuegraf et al.
patent: 6461925 (2002-10-01), John et al.
patent: 6780725 (2004-08-01), Fujimaki

Affiliated with

Also associated with

Rating

Discontinuity prevention for SiGe deposition does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Discontinuity prevention for SiGe deposition, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Discontinuity prevention for SiGe deposition will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3493206