Dielectric layer above floating gate for reducing leakage...

Details Dielectric layer above floating gate for reducing leakage... Dielectric layer above floating gate for reducing leakage...

2011-04-05

2011-04-05

Ngo, Ngan (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S317000, C257SE29129, C257SE29300

Reexamination Certificate

active

07919809

ABSTRACT:
A memory system is disclosed that includes a set of non-volatile storage elements. A given memory cell has a dielectric cap above the floating gate. In one embodiment, the dielectric cap resides between the floating gate and a conformal IPD layer. The dielectric cap reduces the leakage current between the floating gate and a control gate. The dielectric cap achieves this reduction by reducing the strength of the electric field at the top of the floating gate, which is where the electric field would be strongest without the dielectric cap for a floating gate having a narrow stem.

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