Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2003-05-01
2004-10-19
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S748000, C430S329000
Reexamination Certificate
active
06806209
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to the fabrication of semiconductor devices, such as dynamic random access memory devices, and more particularly to lithographic processes such as resist patterning and developing.
BACKGROUND OF THE INVENTION
Integrated circuits (IC's) are typically fabricated from a wafer of semiconductor material, such as silicon. The silicon wafer goes through numerous processing steps in order to manufacture the final IC. A common cycle that wafers go through during manufacture is called photolithography. A basic photolithography cycle flow diagram, including some important process steps is shown in FIG.
1
.
To start the cycle, the wafer is first coated with a photoresist which is a photosensitive material, as indicated in step
110
. Optical pattern transfer tools are used to produce an optical pattern on photoresist which is generally baked subsequent to its deposition on a semiconductor substrate structure. A form of radiation, such as ultraviolet (UV) light, is directed at the optical pattern transfer tool. Transparent portions of the optical pattern transfer tool transmit the light to selected portions of the photoresist while opaque portions of the optical pattern transfer tool prohibit the light from reaching the remaining portions of the photoresist, as indicated in step
120
.
When negative resist is used, photoresist not exposed to radiation is removed to expose portions of the substrate structure while the remaining resist protects unexposed portions of the substrate structure during subsequent processing steps. The opposite is true when positive resist is used. In this case the photo resist exposed to the radiation is removed. After exposure, the desired areas of the resist are selectively removed from the surface of the wafer, utilizing a “develop” step
130
. The removal of selected areas of resist leaves behind both exposed areas of the wafer, and masked areas of the wafer.
During a develop step the portions to be removed are usually rendered soluble in a base solution and rinsed from the semiconductor substrate structure in a solvent such as de-ionized (DI) water. Remaining resist may then be hardened by re-baking to ensure adhesion of the resist to the semiconductor substrate structure.
The exposed areas of the wafer are then processed in one of several ways, including doping, etching and depositing layers of additional material as indicated in step
140
. The masked areas are protected from the processing by the resist that remains on the wafer. After the exposed areas have been processed, the resist that remained on the wafer in masked areas is removed
150
, and the cycle can be repeated. By combining several iterations of this cycle, along with other processing steps, the wafer is transformed into a number of IC chips.
This manufacturing process is extremely flexible, and any number of types of IC's can be fabricated using this technique. One example of IC's that can be made using this technique includes processor chips for information handling devices such as personal computers. Other IC's that can be made using this technique include memory circuits. Dynamic Random Access Memory (DRAM) circuits are typically manufactured using this technique as well as numerous other memory designs, including but not limited to, SDRAMs, SLDRAMs, RDRAMs, SRAMs, VRAMs and EEPROMs.
In the fabrication of IC's, as in any manufacturing process, the processing time to manufacture a device is critical to the manufacturing cost and supply of the product to buyers. Even when processing time is low, a high percentage of manufacturing defects can cut into manufacturing yield, which again negatively affects cost and supply to customers. Therefore, as manufacturing businesses progress, there is constant pressure to make products faster, and with fewer manufacturing defects.
A develop step from a prior method includes a “pre-wet” step to enhance thickness control and uniformity of the develop coating. The pre-wet step consists of coating the surface of the wafer with a de-ionized (DI) water solution before the develop coating is applied to the wafer. The DI solution in the prior art method reacts with a surfactant material in the develop material, and allows the develop coating to attain a more even puddle across the wafer. The prior art method further utilized a spinning wafer to distribute the DI water pre-wet solution and the develop material across the wafer.
However, the pre-wet step uses a considerable amount of process time to complete. It would be desirable to eliminate the pre-wet step while maintaining a controlled, uniform develop coating. It would further be desirable to design a develop process that reduces defects in the develop process, while at the same time, eliminating a costly time step such as the pre-wet step.
SUMMARY OF THE INVENTION
A method of develop processing of a resist surface of a substrate is shown. The method includes coating the resist surface with develop material. Also included is reacting the resist surface with the develop material in selected areas. Further, the method includes spinning the resist surface for a first period of time, and after the first period of time, continuing to spin the resist surface for a second period of time while simultaneously rinsing the resist surface with a solvent to remove the develop material and selected areas of the resist surface. The method may also include using a linear slit scan nozzle to deposit the develop material. It may further include using de-ionized water to rinse the substrate.
Another embodiment of the method includes coating the resist surface with develop material, without pre-wetting the resist surface. Also included is reacting the resist surface with the develop material in selected areas. Further, the other embodiment includes spinning the resist surface for a first period of time, and after the first period of time, continuing to spin the resist surface for a second period of time while simultaneously rinsing the resist surface with a solvent to remove remaining develop material and selected areas of the resist surface.
Positive or negative resist may be used with the inventive method. When negative resist is used, photoresist not exposed to radiation is removed to expose portions of the substrate structure while the remaining resist protects unexposed portions of the substrate structure during subsequent processing steps. The opposite is true when positive resist is used. In this case the photo resist exposed to the radiation is removed.
Various processing steps may be performed in conjunction with the novel develop processing method. Exposed areas of the substrate may be selectively doped, etched, or coated with an additional layer of material.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims.
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Davlin John T.
Montanino Greg
Jr. Carl Whitehead
Micro)n Technology, Inc.
Schwegman Lundberg Woessner & Kluth P.A.
Smoot Stephen W.
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