Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-02-28
2006-02-28
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S262000, C438S301000, C438S228000
Reexamination Certificate
active
07005354
ABSTRACT:
Depletion drain-extended MOS transistor devices and fabrication methods for making the same are provided, in which a compensated channel region is provided with p and n type dopants to facilitate depletion operation at Vgs=0, and an adjust region is implanted in the substrate proximate the channel side end of the thick gate dielectric structure for improved breakdown voltage rating. The compensated channel region is formed by overlapping implants for an n-well and a p-well, and the adjust region is formed using a Vt adjust implant with a mask exposing the adjust region.
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Hao Pinghai
Kubota Tsutomu
Pan Shanjen
Pendharkar Sameer
Todd James R.
Brady III W. James
Garner Jacqueline J.
Lebentritt Michael
Pompey Ron
Telecky , Jr. Frederick J.
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