Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate
2008-09-30
2008-09-30
Ton, David (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Replacement of memory spare location, portion, or segment
C714S718000
Reexamination Certificate
active
11055782
ABSTRACT:
A data memory system includes a non-spare area having a plurality of memory cell blocks and containing pages, a spare area having a plurality of spare memory cell blocks in which data items are previously set to a certain value and containing pages, and a determination circuit which detects a data error of at least two bits when data is read out from the page of the non-spare area and determines the number of error bits in the readout page for each readout page. When the result of determination by the determination circuit indicates two or more bits, the contents of the readout page are error-corrected and programmed into the page of the spare area.
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Goda Akira
Noguchi Mitsuhiro
Kabushiki Kaisha Toshiba
Ton David
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