Damascene interconnect structures including etchback for...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation

Reexamination Certificate

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C438S411000, C438S421000, C438S422000, C438S424000, C438S427000, C438S428000, C438S432000, C438S435000, C438S619000, C438S624000, C438S637000, C438S687000

Reexamination Certificate

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06838355

ABSTRACT:
A method for forming back-end-of-line (BEOL) interconnect structures in disclosed. The method and resulting structure includes etchback for low-k dielectric materials. Specifically, a low dielectric constant material is integrated into a dual or single damascene wiring structure which contains a dielectric material having relatively high dielectric constant (i.e., 4.0 or higher). The damascene structure comprises the higher dielectric constant material immediately adjacent to the metal interconnects, thus benefiting from the mechanical characteristics of these materials, while incorporating the lower dielectric constant material in other areas of the interconnect level.

REFERENCES:
patent: 6121126 (2000-09-01), Ahn et al.
patent: 6184121 (2001-02-01), Buchwalter et al.
patent: 6239016 (2001-05-01), Ishikawa
patent: 6331481 (2001-12-01), Stamper et al.
patent: 6413852 (2002-07-01), Grill et al.
patent: 6413854 (2002-07-01), Uzoh et al.

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