Chemistry: electrical and wave energy – Processes and products – Coating – forming or etching by sputtering
Reexamination Certificate
2001-06-20
2004-07-06
Ryan, Patrick (Department: 1745)
Chemistry: electrical and wave energy
Processes and products
Coating, forming or etching by sputtering
C204S192250, C204S192300, C204S298050, C204S298060, C204S298360
Reexamination Certificate
active
06758947
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention pertains to a method of sputtering a sculptured coating over the walls of a high aspect ratio semiconductor feature in a manner which avoids or significantly reduces the possibility of damage to or contamination of underlying surfaces.
2. Brief Description of the Background Art
As the feature size of semiconductor patterned metal features has become increasingly smaller, it is particularly difficult to use the techniques known in the art to provide multilevel metallurgy processing. In addition, future technological requirements include a switch from the currently preferred metallurgy of aluminum to copper in some applications, because of copper's lower resistivity and higher electromigration resistance. The standard reactive ion etching method frequently used for patterning a blanket metal is particularly difficult with copper, since there are no volatile decomposition products of copper at low temperatures (less than about 200° C.). The alternative deposition lift-off techniques are also limited in applicability in a copper structure, given the susceptibility of copper to corrosion by the lift-off solvents. Therefore, the leading process for formation of copper-comprising devices is a damascene structure, which requires the filling of embedded trenches and/or vias.
A typical process for producing a damascene multilevel structure having feature sizes in the range of 0.5 micron (&mgr;) or less would include: blanket deposition of a dielectric material; patterning of the dielectric material to form openings; application of a barrier layer over the surface of the dielectric material; deposition of a conductive material onto the substrate in sufficient thickness to fill the openings; and removal of excessive conductive material from the substrate surface using a chemical, mechanical, or combined technique such as chemical-mechanical polishing. When the feature size is below about 0.25&mgr;, typically the barrier layer and/or the conductive fill layer are deposited using a method selected from chemical vapor deposition (CVD), evaporation, electroplating, or ion deposition sputtering. Chemical vapor deposition, being completely conformal in nature, tends to create voids in the center of the filled opening, particularly in the instance of high aspect ratio features. Further, contaminants from the deposition source are frequently found in the deposited conductive material, which may affect adhesion and other film properties. Evaporation is successful in covering shallow features, but is generally not practical for the filling of high aspect ratio features, in part because the deposition rate for the evaporation technique is particularly slow, and also because of poor step coverage. Electroplating has recently shown promise as a method of filling contact vias, but the crystal orientation of electroplated copper is not optimum for the reduction of electromigration unless a proper seed layer is deposited prior to electroplating. Sputtered copper has been used to provide a seed layer over which a fill layer of electroplated copper or CVD copper can be applied, to improve crystal structure and improve device performance.
No matter which technique is used for the application of copper, prior to that application it is necessary to apply a barrier layer which prevents the diffusion of copper into adjacent materials. The barrier layer needs to be continuous and free from any openings which might permit the diffusion of copper atoms. Formation of such a continuous barrier layer is particularly difficult when the barrier layer must cover the surface of a feature having an aspect ratio of greater than about 3:1 and a feature size of 0.5 &mgr;m or less. The preferred method of application of a barrier layer is physical vapor deposition (PVD) with plasma sputtering being preferred among the PVD methods, due to the higher deposition rates obtainable using this method. Traditional plasma sputtering is used when possible, due to simplicity of the equipment required to carry out deposition. In some instances, when particularly small feature sizes are involved, less than 0.25&mgr;, for example, it may be necessary to use ion-deposition plasma (IMP) sputtering techniques.
Due to the difficulty in sculpturing a coating layer, whether it be a barrier layer, or a principally conductive layer, to fit a high aspect ratio, small dimensioned feature, a number of techniques have been developed in an attempt to provide the properly-shaped coating layer.
U.S. Pat. No. 5,312,509 of Rudolph Eschbach, issued May 17, 1974, discloses a manufacturing system for low temperature chemical vapor deposition (CVD) of high purity metals. In particular, a semiconductor substrate including etched patterns is plasma cleaned, sputter coated with adhesion and nucleation seed layers, and a conductive layer is then applied using CVD. The CVD deposited metal is formed using a complex combination of reactor and substrate conditions which are controlled using a computer guidance system. This manufacturing system is recommended for the CVD deposition of pure copper at low temperatures.
U.S. Pat. No. 4,514,437 to Prem Nath, issued Apr. 30, 1985, discloses a method and apparatus for depositing thin films, such as indium tin oxide, onto substrates. The deposition comprises one step in the fabrication of electronic, semiconductor and photovoltaic devices. An electron beam is used to vaporize a source of solid material, and electromagnetic energy is used to provide an ionizable plasma from reactant gases. By passing the vaporized solid material through the plasma, it is activated prior to deposition onto a substrate. In this manner, the solid material and the reactant gases are excited to facilitate their interaction prior to the deposition of the newly formed compound onto the substrate.
U.S. Pat. No. 4,944,961 to Lu et al., issued Jul. 31, 1990, describes a process for partially ionized beam deposition of metals or metal alloys on substrates, such as semiconductor wafers. Metal vaporized from a crucible is partially ionized at the crucible exit, and the ionized vapor is drawn to the substrate by an imposed bias. Control of substrate temperature is said to allow non-conformal coverage of stepped surfaces such as trenches or vias. When higher temperatures are used, stepped surfaces are planarized. The examples given are for aluminum deposition, where the non-conformal deposition is carried out with substrate temperatures ranging between about 150° C. and about 200° C., and the planarized deposition is carried out with substrate temperatures ranging between about 250° C. and about 350° C.
U.S. Pat. No. 4,976,839 to Minoru Inoue, issued Dec. 11, 1990 discloses a titanium nitride barrier layer of 500 Å to 2,000 Å in thickness formed by reactive sputtering in a mixed gas including oxygen in a proportion of 1% to 5% by volume relative to the other gases, comprising an inert gas and nitrogen. The temperature of the silicon substrate during deposition of the titanium nitride barrier layer ranged between about 350° C. and about 500° C. during the sputtering, and the resistivity of the titanium nitride film was “less than 100 &mgr;&OHgr;-cm”.
U.S. Pat. No. 5,246,885 to Braren et al., issued Sep. 21, 1993, proposes the use of a laser ablation system for the filling of high aspect ratio features. Alloys, graded layers, and pure metals are deposited by ablating targets comprising more than one material using a beam of energy to strike the target at a particular angle. The ablated material is said to create a plasma composed primarily of ions of the ablated material, where the plasma is translated with high directionality toward a surface on which the material is to be deposited. The preferred source of the beam of energy is a UV laser. The heating of the deposition surface is limited to the total energy deposited by the beam, which is said to be minimal.
S. M. Rossnagel and J. Hopwood describe a technique of combining conventional magnetron sputtering with a hig
Chen Fusen E.
Chiang Tony
Chin Barry L.
Ding Peijun
Kohara Gene Y.
Applied Materials Inc.
Church, Esq. Shirley L.
Mercado Julian
Ryan Patrick
LandOfFree
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