Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-02-21
2006-02-21
Dang, Phuc T. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000
Reexamination Certificate
active
07001835
ABSTRACT:
A hardmask layer in the back end of an integrated circuit is formed from TaN having a composition of less than 50% Ta and a resistivity greater than 400 μOhm-cm, so that it is substantially transparent in the visible and permits visual alignment of upper and lower alignment marks through the hardmask and intervening layer(s) of ILD. A preferred method of formation of the hardmask is by sputter deposition of Ta in an ambient containing N2and a flow rate such that (N2flow)/(N2+carrier flow)>0.5.
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Clevenger Lawrence A.
Cowley Andrew P.
Dalton Timothy J.
Hoinkis Mark
Kaldor Steffen K.
Blecker Ira D.
Dang Phuc T.
Infineon - Technologies AG
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