Coupling well structure for improving HVMOS performance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S339000, C257SE21409

Reexamination Certificate

active

07816214

ABSTRACT:
A semiconductor structure includes a substrate, a first well region of a first conductivity type overlying the substrate, a second well region of a second conductivity type opposite the first conductivity type overlying the substrate, a cushion region between and adjoining the first and the second well regions, an insulation region in a portion of the first well region and extending from a top surface of the first well region into the first well region, a gate dielectric extending from over the first well region to over the second well region, wherein the gate dielectric has a portion over the insulation region, and a gate electrode on the gate dielectric.

REFERENCES:
patent: 5912493 (1999-06-01), Gardner et al.
patent: 6265725 (2001-07-01), Moll et al.
patent: 6265752 (2001-07-01), Liu et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Coupling well structure for improving HVMOS performance does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Coupling well structure for improving HVMOS performance, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Coupling well structure for improving HVMOS performance will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4203868

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.