Coupling circuit and method for discharging a non-selected bit l

Static information storage and retrieval – Read/write circuit – Precharge

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Details

365149, 365210, 365202, G11C 700, G11C 1124

Patent

active

053011570

ABSTRACT:
The invention is a coupling circuit for quickly increasing the differential potential between non-selected bit lines and selected bit lines in the case where the digital data has a high logic state, while retaining a valid differential potential for the case where the digital data has a low logic state. The circuit comprises a true and a complement coupling line typically held at an equilibrate potential substantially equal to the equilibrate potential of the bit lines. A coupling capacitor is electrically interposed between each of the true bit lines and the true coupling line and a coupling capacitor is electrically interposed between each of the complement bit lines and the complement coupling line. During cell selection the potential of the coupling line in electrical communication with the non-selected bit lines is switched to a reference potential by select coupling line circuitry. Once the non-selected bit lines are coupled to the reference potential through the coupling capacitors the equilibrate potential on the non-selected bit lines discharge thereby decreasing the potential on the non-selected bit lines and increasing the differential potential between the selected and the non-selected bit lines.

REFERENCES:
patent: 4792922 (1988-12-01), Mimoto et al.
patent: 5184326 (1993-02-01), Hoffmann et al.

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