Controlling warping in integrated circuit devices

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With stress relief

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257SE23045

Reexamination Certificate

active

07598602

ABSTRACT:
Techniques for integrated circuit device fabrication are provided. In one aspect, an integrated circuit device comprises a base, at least one die attached to the base, and a counterbalancing layer on at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. In another aspect, warping of an integrated circuit device comprising at least one die attached to a base is controlled by applying a counterbalancing layer to at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die.

REFERENCES:
patent: 7084489 (2006-08-01), Thurgood
patent: 7164200 (2007-01-01), Brennan et al.
patent: 2005/0189616 (2005-09-01), Brennan et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Controlling warping in integrated circuit devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Controlling warping in integrated circuit devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Controlling warping in integrated circuit devices will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4101267

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.