Controlling warping in integrated circuit devices

Details Controlling warping in integrated circuit devices Controlling warping in integrated circuit devices

2005-03-31

2008-08-05

Zarneke, David A (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With stress relief

C257SE23045

Reexamination Certificate

active

07408246

ABSTRACT:
Techniques for integrated circuit device fabrication are provided. In one aspect, an integrated circuit device comprises a base, at least one die attached to the base, and a counterbalancing layer on at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. In another aspect, warping of an integrated circuit device comprising at least one die attached to a base is controlled by applying a counterbalancing layer to at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die.

REFERENCES:
patent: 7084489 (2006-08-01), Thurgood
patent: 7164200 (2007-01-01), Brennan et al.
patent: 2005/0189616 (2005-09-01), Brennan et al.

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