Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2002-01-30
2004-01-06
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S625000, C438S643000, C438S694000, C438S648000, C438S679000, C204S192120, C204S298090, C204S298120
Reexamination Certificate
active
06673716
ABSTRACT:
RELATED APPLICATIONS
This application is related to U.S. patent application Ser. No. 10/060,724 (Attorney Docket No. NOVE100028000), filed the same day and assigned to the same assignee as the present application, the disclosure of which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for depositing titanium (Ti) liner layers and titanium nitride (TiN) barrier layers for applications in semiconductor processing having improved via and contact resistance.
2. Description of Related Art
In the manufacture of semiconductor devices, metal conductive layers are patterned for the purpose of making interconnections between different points on the device. After formation of this patterned metal conductive layer an electrically insulative material is deposited over the metal conductive layer. Vias may then be etched in the insulative layer in positions where contacts are desired between conductive regions. A robust diffusion barrier, or liner, may then be deposited into the via between the underlying metal and a metal layer deposited therein, such as by chemical vapor deposition of tungsten (W), for the formation of a stud. The robust diffusion barrier both prevents attack of the underlying metal and acts as an adhesion layer for stud.
In modern integrated circuit (“IC”) technology, a metallization comprising a Ti layer, a TiN layer and a top conductive layer is often provided on a surface of a semiconductor body. The Ti layer serves to obtain good adhesion and low contact resistance between the metallization and the semiconductor body. Typically, the TiN layer serves as a barrier between a top conductive layer of Al and the underlying Ti layer, thereby preventing chemical reactions there-between. That is, the Ti layer reduces any oxide left on the underlying Al layer after a sputter preclean step, thus allowing for low contact resistance. Alternatively, the TiN layer may serve as a barrier between the Ti layer and a top conductive layer of W deposited using WF
6
, thereby preventing chemical reactions between Ti and F which is formed during such a CVD process. Additionally, the TiN layer is needed to improve the adhesion of the CVD W for a following CMP removal step. An anti-reflective coating (“ARC”) of TiN can also be deposited on the surface of the W or Al. Thus, a typical stack arrangement on an IC semiconductor substrate may include a Ti contact layer on the semiconductor surface, a TiN barrier layer, a W or Al interconnect layer, and a TiN ARC layer for the purpose of reducing optical reflection.
These films are generally deposited by physical vapor deposition (PVD), also known as sputtering. Various physical vapor deposition (“PVD”) sputtering techniques known in the art for depositing TiN/Ti stacks may be categorized as either nitrided mode (“NM”), i.e., poisoned mode, or non-nitrided mode (“NNM”), i.e., metallic mode. In the NM (nitrided mode), typically a titanium target is placed in a sputter chamber, and the TiN layers are deposited by sputtering titanium with a sputter gas, such as argon (“Ar”), in the presence of nitrogen. In a NM technique, the titanium target is inundated with nitrogen atoms, becoming “nitrided”, such that a coating of TiN forms on the surface of the titanium target. This decreases the overall deposition rate of the desired layer of TiN onto the IC substrate because the nitrogen in the titanium target interferes with the sputtering of titanium. A disadvantage is that the titanium target used to deposit TiN cannot then be used to deposit Ti. As a result, various separate deposition chamber techniques have been introduced in the art for depositing each of the Ti and TiN layers.
It is also known in the art to deposit the Ti/TiN stacks in the non-nitrided mode (“NNM”), i.e., metallic mode. Deposition of TiN in the NNM keeps the N
2
away from the target, hence, the target being non-nitrided or the target being in a metallic mode. In the NNM, the depositions of the Ti and TiN layers may be performed in the same deposition chamber, allowing for a higher throughput for the PVD system and allowing redundancy to be built into the system. It has been found that TiN deposited in the NNM mode tends to be a poor barrier by itself, often requiring having to anneal the NNM TiN deposited layer, such as by Rapid Thermal Nitridation or Rapid Thermal Anneal, to improve the TiN barrier properties. In so doing, the annealing step improves the barrier properties by causing growth at the grain boundary of the TiN, thereby reducing the diffusion of WF6 gas used for the CVD deposition of a W layer thereover, and hence improving the barrier properties. The nitridation or anneal step also influences the nucleation (initial growth steps) of the CVD W and plays an influential role in the final film properties of the CVD W film that is grown on the TiN barrier film. However, having to anneal the NNM TiN deposited layer requires additional processing steps and, as such, increases both time and processing expenses.
It is also known in the art to use a shutter that allows deposition of Ti and TiN in the same deposition chamber. A Ti layer is first deposited using a Ti target. Then, a TiN layer is deposited on the Ti layer using the same Ti target in a NM. During TiN deposition in the NM, the Ti target becomes nitrided, i.e., poisoned. Before depositing the Ti layer on the next wafer, the shutter is inserted between the target and the wafer, and the target is sputtered in the absence of nitrogen gas to sputter away the nitrided components to return the target to its clean, metallic state and ready for the sputtering of pure Ti. To reduce the inefficiency of using a shutter or separate chambers for Ti and TiN deposition, modifications in the sputtering sequence have been suggested in the prior art, such as, the deposition of an extra Ti layer to sputter away the nitrogen in the nitrided titanium target, returning it to a pure Ti state, thereby reducing the number of chambers being used. However, the use of an extra titanium layer has the disadvantage that if a CVD W layer is deposited on the extra Ti layer using WF
6
, any free Ti reacts with F to form a layer of TiF
s
, to which W has a bad adhesion. Accordingly, the use of a shutter in the deposition processes of Ti and TiN layers also requires additional processing steps, increases processing time, and increases processing costs.
As the aspect ratio (“AR”) of the via increases, i.e., the ratio of the height of the aperture to its width, it has been found that conventional sputtering techniques do not provide acceptable deposition results. As the AR increases, far less material is being deposited at the bottom of the vias than at the top surfaces of the vias, since the sidewalls “shadow” the lower exposed surface. The deposited material at the upper surfaces increasingly accentuates the shadowing effect, thereby prematurely closing the upper section of the via and preventing effective fill of the lower section. For example, with a conventional sputter method, bottom coverage is only about 5% in a via having an AR of 5:1. In order to improve the deposition of Ti and TiN into vias having increased AR, collimation sputtering techniques have been developed in the art.
Collimation techniques having a collimating filter, as known in the art, between the target and the substrate impart greater directionality to the atoms reaching the substrate surface. The use of a collimator allows deposition of Ti and TiN in vias with aspect ratios up to about 2 or 3. However, collimation techniques are inefficient as much of the target material is wasted and builds up on the cell walls of the filter which can lead to an undesired increase in the number of particulates in the system, making it necessary to replace or clean the collimator frequently. Also, since most of the sputtered material does not pass through the collimator and is wasted, the deposition rate is slow and the rate of consumption of the target is high. To overcome such problems, prior art has been aimed a
D'Couto Gerard C.
Danek Michal
Tkach George
Woitge Michael
DeLio & Peterson LLC
Jr. Carl Whitehead
Novellus Systems Inc.
Pham Thanhha
Reynolds Kelly M.
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