Connection structures for integrated circuits and processes...

Details Connection structures for integrated circuits and processes... Connection structures for integrated circuits and processes...

2002-02-21

2003-05-13

Clark, Jasmine J B (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S774000, C257S750000, C257S762000, C257S771000, C257S773000

Reexamination Certificate

active

06563221

ABSTRACT:

FIELD OF THE INVENTION
The invention pertains to connection structures for integrated circuits, and has particular application to integrated circuits employing copper interconnection networks.
BACKGROUND OF THE INVENTION
Integrated circuits (ICs) are manufactured by forming discrete semiconductor devices such as MOSFETS and bipolar junction transistors on the surface of a silicon wafer, and then forming a metal interconnection network in contact with the devices to create circuits. The metal interconnection network is composed of horizontal layers of individual metal wirings. The metal wirings are connected to devices on the wafer by vertical contacts, and are connected to other metal wirings by vertical vias. A typical interconnection network employs multiple levels of wiring and vias.
Wiring may be formed through a conventional patterning process by patterning wires from a layer of metal, and then depositing an insulating material over the wiring. Alternatively, wiring may be formed through a damascene process by depositing an insulating layer, patterning and etching voids in the insulating layer, and then depositing metal into the voids. Contacts and vias are conventionally formed using a damascene process. Typically wiring layers are formed separately from contacts and vias in separate insulating layers, or are formed together in a single damascene process.
The performance of integrated circuits is determined in large part by the conductance and capacitance of the metal interconnection network. Conventional interconnection networks used metals such as tungsten and titanium to form wiring, vias and contacts. In recent years copper has become a preferred metal for interconnection networks because of its low resistivity compared to other conventional metals. However, copper has properties that are disadvantageous compared to the conventional metals. For example, copper migrates easily through insulating materials during processing, thus requiring the use of a layer of a protective material such as SiN to inhibit migration. Deposition of copper is also more difficult than deposition of conventional metals because it is necessary to form a copper seed layer using physical vapor deposition, followed by bulk deposition of copper by electroplating.
FIG. 1
shows an example of a conventional copper contact and wiring structure formed together in a damascene process. In this example, a MOSFET gate structure consisting of a gate electrode
14
, gate insulating layer
12
and insulating side walls
16
is formed on a substrate
10
. A copper structure
22
comprising a contact portion
22
a
and a wiring portion
22
b
is formed in contact with the gate electrode
14
through a damascene process. Surrounding the copper structure
22
is a copper seed layer
20
, and surrounding the seed layer
20
is a protective layer
18
.
Formation of the structure of
FIG. 1
is more complex than formation of contacts and wiring using conventional metals since it is necessary to form barrier and seed layers within the space for the contact before bulk copper can be deposited. Thus the barrier and seed layers reduce the amount of space that can be occupied by the copper contact. Where design rules are small, these layers may leave virtually no room for the copper contact.
SUMMARY OF THE INVENTION
Preferred embodiments of the invention address the foregoing shortcomings of the conventional technology by providing a hybrid connection structure comprising a patterned contact or via and a damascene wiring. The hybrid connection structure is formed through a hybrid process whereby a single layer of insulating material is deposited around patterned contacts or vias and further serves as the substrate in which wiring is inlaid in contact with the contacts or vias. Unlike conventional technology, methods in accordance with the preferred embodiment utilize a patterned conductor as a contact or via. In accordance with preferred embodiments, the wiring is formed of copper, and the contact or via is formed of aluminum. The use of patterned aluminum overcomes the inability of conventional technologies to use aluminum as a contact or via conductor material in narrow design rule structures because of its poor damascene filling properties. The use of patterned aluminum further avoids the disadvantages entailed in forming a narrow copper contact or via.
Accordingly, embodiments of the invention pertain to a method for forming a connection structure in an integrated circuit. A first conducting material is deposited in contact with a substrate and patterned to form a conducting stud in electrical contact with a conducting element of the substrate. A single layer of dielectric is formed over the substrate and the conducting stud. A trench is formed in the dielectric to expose a top portion of the conducting stud, and a second conducting material is inlaid in the trench in electrical contact with the conducting stud to form a wiring. The electrically conducting element of the substrate may be a wiring or an element of a semiconductor device. The first conducting material may be aluminum, the second conducting material may be copper, and the dielectric may be an organic low-k dielectric.
Related embodiments of the invention pertain to an interconnection structure for an integrated circuit. The structure comprises a substrate that includes a conducting element, and a single layer of dielectric formed over the substrate. A conductive stud is disposed within the layer of dielectric in electrical contact with the conducting element. A conductive material is inlaid in a trench in the dielectric in electrical contact with the conductive stud to form a wiring. The electrically conducting element of the substrate may be a wiring or an element of a semiconductor device. The first conducting material may be aluminum, the second conducting material may be copper, and the dielectric may be an organic low-k dielectric.
Further embodiments of the invention pertain to a method for forming an interconnection structure for an integrated circuit. Aluminum is deposited in contact with a substrate and patterned to form an aluminum stud in electrical contact with a conducting element of the substrate. Dielectric is formed over the substrate and the aluminum stud. A trench is formed in the dielectric to expose a top portion of the aluminum stud, and copper is inlaid in the trench in electrical contact with the aluminum stud to form a wiring. The electrically conducting element of the substrate may be a wiring or an element of a semiconductor device. The dielectric may be a single layer of dielectric and may be an organic low-k dielectric.
Related embodiments of the invention pertain to an interconnection structure for an integrated circuit. The structure comprises a substrate that includes a conducting element, and dielectric formed over the substrate. An aluminum stud is disposed within the layer of dielectric in electrical contact with the conducting element. Copper is inlaid in a trench in the dielectric in electrical contact with the aluminum stud to form a wiring. The electrically conducting element of the substrate may be a wiring or an element of a semiconductor device. The dielectric may be a single layer of dielectric and may be an organic low-k dielectric.


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patent: 6127734 (2000-10-01), Kimura
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patent: 6368952 (2002-04-01), Liang et al.
patent: 6255732 (2002-07-01), Yokoyama et al.

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