Configurable scan path structure

Details Configurable scan path structure Configurable scan path structure

2006-01-17

2006-01-17

DeCady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

Reexamination Certificate

active

06988228

ABSTRACT:
A test structure is for a circuit (20) includes a scan configuration module (26), including routing circuitry (28) and control (30). The routing circuitry (28), under control of control circuitry (30) can be configured to route scan test signals to various scan core modules (36) over a selected number of input scan ports SI(N−1:0) and output scan ports SO(N−1:0). Thus, the number of scan ports used can be varied depending upon the tester being used.

REFERENCES:
patent: 6125464 (2000-09-01), Jin

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