Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated...
Reexamination Certificate
2007-01-09
2007-01-09
Potter, Roy Karl (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
C257S777000
Reexamination Certificate
active
11103217
ABSTRACT:
More complete bonding of wafers may be achieved out to the edge regions of the wafer by constrained bond strengthening of the wafers in a pressure bonding apparatus after direct wafer bonding. The pressure bonding process may be accompanied by the application of not above room temperature.
REFERENCES:
patent: 4254426 (1981-03-01), Pankove
patent: 5932048 (1999-08-01), Furukawa et al.
patent: 6534381 (2003-03-01), Cheung et al.
Lei Ryan
Shaheen Mohamad
Tolchinsky Peter
Yablok Irwin
Intel Corporation
Potter Roy Karl
Trop Pruner & Hu P.C.
LandOfFree
Complete device layer transfer without edge exclusion via... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Complete device layer transfer without edge exclusion via..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Complete device layer transfer without edge exclusion via... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3742224