Complementary metal oxide semiconductor transistor...

Details Complementary metal oxide semiconductor transistor... Complementary metal oxide semiconductor transistor...

2007-06-05

2007-06-05

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S228000, C438S300000, C257SE21632

Reexamination Certificate

active

11227264

ABSTRACT:
A CMOS integrated circuit includes a substrate having an NMOS region with a P-well and a PMOS region with an N-well. A shallow trench isolation (STI) region is formed between the NMOS and PMOS regions and a composite silicon layer comprising a strained SiGe layer is formed over said P well region and over said N well region. The composite silicon layer is disconnected at the STI region. Gate electrodes are then formed on the composite layer in the NMOS and PMOS regions.

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