Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-07-04
2006-07-04
Lamarre, Guy (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S718000
Reexamination Certificate
active
07073112
ABSTRACT:
An apparatus that improves Built-In-Self-Test (BIST) flexibility. A compilable address magnitude comparator facilitates BIST testing of different size memory arrays without requiring customization of the BIST controller. The compilable address magnitude comparator is compiled within the compilable memory arrays of the ASIC to allow a single BIST controller to test multiple sizes of memory arrays without requiring that the BIST controller be compilable. The compilable magnitude address comparator overrides the self-test signal from the BIST when the BIST attempts to test addresses not existing in the memory. The BIST is prevented from writing to addresses that do not exist, and does not receive error signals from those addresses. The BIST controller is able to test memory arrays without regard for their particular size. A single BIST controller can be used to test multiple memory arrays of different sizes in the ASIC, reducing device complexity.
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Chai Chiaming
Fischer Jeffrey H.
Ouellette Michael R.
Wood Michael H.
Canale Anthony
Chaudry Mujtaba K.
International Business Machines - Corporation
Lamarre Guy
Schmeiser Olsen & Watts
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