Compilable address magnitude comparator for memory array...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C714S718000

Reexamination Certificate

active

07073112

ABSTRACT:
An apparatus that improves Built-In-Self-Test (BIST) flexibility. A compilable address magnitude comparator facilitates BIST testing of different size memory arrays without requiring customization of the BIST controller. The compilable address magnitude comparator is compiled within the compilable memory arrays of the ASIC to allow a single BIST controller to test multiple sizes of memory arrays without requiring that the BIST controller be compilable. The compilable magnitude address comparator overrides the self-test signal from the BIST when the BIST attempts to test addresses not existing in the memory. The BIST is prevented from writing to addresses that do not exist, and does not receive error signals from those addresses. The BIST controller is able to test memory arrays without regard for their particular size. A single BIST controller can be used to test multiple memory arrays of different sizes in the ASIC, reducing device complexity.

REFERENCES:
patent: 4939694 (1990-07-01), Eaton et al.
patent: 5388104 (1995-02-01), Shirotori et al.
patent: 5416920 (1995-05-01), Saito et al.
patent: 5535164 (1996-07-01), Adams et al.
patent: 5646948 (1997-07-01), Kobayashi et al.
patent: 5673388 (1997-09-01), Murthi et al.
patent: 5675545 (1997-10-01), Madhavan et al.
patent: 5689466 (1997-11-01), Qureshi
patent: 5719879 (1998-02-01), Gillis et al.
patent: 5740098 (1998-04-01), Adams et al.
patent: 5740179 (1998-04-01), Dorney et al.
patent: 5796745 (1998-08-01), Adams et al.
patent: 5818772 (1998-10-01), Kuge
patent: 5835502 (1998-11-01), Aipperspach et al.
patent: 5961653 (1999-10-01), Kalter et al.
patent: 5961657 (1999-10-01), Park et al.
patent: 5963566 (1999-10-01), Rajsuman et al.
patent: 5974579 (1999-10-01), Lepejian et al.
patent: 6081910 (2000-06-01), Mifsud et al.
patent: 6108252 (2000-08-01), Park
patent: 6249889 (2001-06-01), Rajsuman et al.
patent: 6343366 (2002-01-01), Okitaka
patent: 6351789 (2002-02-01), Green
patent: 6360342 (2002-03-01), Lee et al.
patent: 6658610 (2003-12-01), Chai et al.
patent: 6728910 (2004-04-01), Huang

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Compilable address magnitude comparator for memory array... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Compilable address magnitude comparator for memory array..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Compilable address magnitude comparator for memory array... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3565268

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.